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- Subject
- Analog Electronicselectrical-engineering-mcqs › analog-electronics
- Published
- 19 Dec 2018
- Last updated
- 28 May 2026
Explanation
Given the slew rate (SR) of 1 V/µs and a gain of 40 dB (which corresponds to a voltage gain of 100), the maximum output voltage amplitude without slew rate distortion is limited by SR and frequency. Calculating the maximum input voltage amplitude to avoid distortion results in 795 mV. Hence, the correct input limit is 795 millivolts.
More Analog Electronics MCQs
Practice related questions from the same subject.
- 1.In a common base amplifier configuration, how does the AC collector voltage relate to the AC base voltage?
- 2.Why is it important to encapsulate a transistor?
- 3.A cascade amplifier is formed by connecting which combination of amplifier stages?
- 4.Three identical amplifiers, each with a voltage gain of 50, an input resistance of 1 kΩ, and an output resistance of 250 Ω, are connected in series. What is the overall open-circuit voltage gain (in dB) of the combined amplifier?
- 5.Given an npn BJT with transconductance gm = 38 mA/V, capacitances cμ = 10⁻¹⁴ F and cπ = 10⁻¹³ F, and a DC current gain β₀ = 90, what are the values of the cutoff frequency fT and the transition frequency fβ?
- 6.When a MOSFET switch is turned on, it can be modeled as which of the following components?
- 7.Given a transistor with a current gain (β) of 0.98, a collector leakage current (Ico) of 6µA, and a base current (Iβ) of 100µA, what is the collector current (Ic)?
- 8.What type of feedback does an unbypassed resistor provide in a common emitter amplifier?
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